1. Field of the Invention
The present invention pertains to a design method for plating of a printed circuit board (PCB) strip and a manufacturing method of a semiconductor chip package using the same. More particularly, the present invention relates to a design method for plating of a printed circuit board strip, in which a main plating line is optionally formed on a component side, a solder side, or an inner layer of the PCB strip by modifying a sub-plating line of the PCB strip used to manufacture a semiconductor chip package, and the semiconductor chip package manufactured using the same.
2. Description of the Prior Art
Being able to cope with performance of a semiconductor chip with high density input and output pins such as IC (integrated circuit) and LSI (large scale integrated circuit), a PCB strip is applied to a semiconductor chip package in which balls or pins acting as an input and output means are formed on a bottom side of the semiconductor chip package, such as a ball grid array package, a pin grid array package, and a chip size package.
With reference to FIG. 1, a plurality of PCB units 20 each provided with a component side and a solder side are arranged at regular intervals on a PCB strip 10. For example, fourteen PCB units are arranged on the PCB strip with a size of 220 mm 60 mm. At this time, a distance X between the PCB units is about 250 μm to 350 μm.
Recently, the semiconductor chip package is applied to various electronic goods, communication equipments, and computers, thus allowing them to have multi- and newest-functions. Further, in accordance with the recent trend of mass production of the semiconductor chip package, there remains a need to reduce an interval between the PCB units to increase the number of PCB units in the PCB strip as shown in FIG. 2.
Referring to FIG. 2, the interval Y between the PCB units is about 180 μm, which is shorter than the interval X in FIG. 1. However, a high technology is needed to reduce the interval between the PCB units, and when the improved PCB strip in which the interval between the PCB units is reduced is divided into individual PCB units, a short occurs in a printed circuit pattern due to misalignment of a component side with a solder side, thereby undesirably reducing productivity due to an increase in the number of inferior semiconductor chip packages.
A conventional process of manufacturing a semiconductor chip package comprises plating desired portions of a PCB strip through a main plating line formed on a component or a solder side of the PCB strip, mounting a semiconductor chip on the component side, wire-bonding the resulting structure, cutting reed lines protruded from the solder side, soldering the solder side, and dividing the resulting PCB strip into individual PCB units using a sawing machine. At this time, the diameter of the sawing machine is about 200 μm, and the PCB strip is cut along the main plating line on the solder side.
In the case of the PCB strip of FIG. 1, because the interval between the individual PCB units is broad, a few PCB units are arranged in one strip, so the short of the printed circuit pattern on the component side is not critical even though the PCB strip is cut by the conventional sawing machine. However, if the interval between individual PCB units is reduced as shown in FIG. 2, occurrence of short circuit is undesirably increased when the PCB strip 10 is cut along the main plating line 30 on the solder side using the conventional sawing machine.
Referring to FIGS. 4 and 5, an enlarged view of a portion A of FIG. 2 illustrating the solder side 12 of the PCB strip in which an interval between the PCB units is reduced to desirably increase the number of PCB units in the PCB strip, and another enlarged view of a portion B of FIG. 3 illustrating the component side 14 of the PCB strip of FIG. 2 are shown, respectively.
As in FIG. 4, a solder ball part 60 on which a solder ball is to be formed is plated with Au through a first plating line 32 connected to a first main plating line 30 of the solder side 12 of the PCB strip. Further, an isolated solder ball part 61 which is not connected to the first main plating line 30 or the first plating line 32 is plated through a second main plating line 70 of the component side 14 of FIG. 5 and a via land 50 placed on a copper-clad part 40 of the component side 14 corresponding in position to the isolated solder ball part 61.
Furthermore, a first bond finger part 81, which is subjected to a wire-bonding, on the component side 14 of the PCB strip is plated with Au through a second plating line 72 connected to the second main plating line 70. Additionally, an isolated bond finger part 82 is plated with Au through the via land 50 positioned on the copper-clad part 40 of the solder side corresponding in position to the isolated bond finger part 82.
With reference to FIG. 6, the PCB strip provided with the component side of FIG. 5 and the solder side of FIG. 4 is illustrated. In detail, FIG. 6 is an enlarged view of the PCB strip of which an upper side, forming the component side of FIG. 5 is overlapped on a lower side thereof forming the solder side of FIG. 4. Additionally, FIG. 7 is a schematic side view of the PCB strip illustrating misalignment of the component side from the solder side, FIG. 8 is an X-ray picture of the PCB strip in which misalignment of the component side from the solder side is formed, and FIG. 9 is an X-ray picture of the PCB strip without misalignment of the component side from the solder side.
As described above, the soldered PCB strip is cut along the first main plating lines 30 of the solder side 12 using the conventional sawing machine. However, when a width of a cut part 90 of the PCB strip is about 200 μm and the PCB strip is cut along the first main plating lines 30 of the solder side 12 using a blade, as shown in FIG. 7 illustrating the side view of the PCB strip and the X-ray picture of FIG. 8, a short 100 occurs on the component side. Accordingly, any misalignment should be avoided between the component side and the solder side so that the second main plating line 70 of the component side completely or partially accords with the first main plating line 30 of the solder side to prevent the short of the printed circuit pattern, as shown in FIG. 9. However, a very high-leveled technology is needed to avoid the misalignment of the component side from the solder side, and conventional efforts are not sufficiently effective.